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FIN FIELD EFFECT TRANSISTORS Could GAAFETs replace finFETs in power electronics?

From Luke James

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There’s a constant need to reduce size while simultaneously providing higher density for power devices, however, finFETs could soon run out of steam. Of all the potential successors to finFETs, GAAFETs appear to be the most promising of all.

Samsung’s MBCFET GAA, which is formed as a nanosheet.
Samsung’s MBCFET GAA, which is formed as a nanosheet.
(Source: Samsung)

Chipmakers are constantly readying their next-generation technologies based on transistors that are constantly getting smaller, and every so often it’s necessary to replace one transistor technology with another so that scaling can continue.

This happened when we passed the 22 nm to 16 nm barrier, something which prompted almost all of the major semiconductor companies to transition from planar transistors to fin Field-Effect Transistors (finFETs).

Fin field-effect transistors

As manufacturing processes advanced, transistors and their gates became smaller and less effective. Scaling brought a host of new issues too, such as tunnel leakage, mobility degradation, and short channel effects. One way to resolve these issues was to move from a planar to a three-dimensional configuration, with the channel’s gate on three sides, increasing surface area for better control of electrostatics - the finFET.

This method came with many benefits such as better drive currents, better scalability, faster switching times, and was an overall better choice for semiconductor logic. It also provided more control over leakage current and short-channel problems.

However, the finFET is also limited, and signs of exhaustion have been all too clear during the last two generations of the technology. Indeed, there will come a time, when the ability to scale a finFET will too slow down and eventually come to a halt, and new technologies will be needed to help continue scaling efforts.

Given that we’re very quickly approaching the theoretical limit of finFETs - they’re expected to scale to 5 nm / 3 nm as per Intel’s estimations - research on potential successors has been progressing with haste, and much of this research attention has been focussed on ‘Gate-All-Around’ (GAA) technology which ‘lifts’ up the channel and allows the channel width to scale as needed for the type of transistor in use.

The transistor’s next evolution

GAA devices were first proposed in 1990 well before finFETs, but finFETs turned out to be much easier to implement in production. GAA Field-Effect Transistors (GAAFETs) can either be based on nanowires or stacked nanosheets, aligned either parallel or perpendicular to the substrate. Since 2017, the industry has been focussing more on horizontally stacked nanosheets as the best alternative for the 5 nm generation.

Industry heavyweight Samsung was the first company to experiment with the technology, presenting the Multi-Bridge Channel FET (MBCFET) GAA as its 3 nm manufacturing process. MBCFET technology integrates GAAFETs as the main innovation. In comparison to finFETs, Samsung’s MBCFET has three main advantages:

  • No extra area needed to improve speed as nanosheets are stacked vertically.
  • It supports the same process tools and manufacturing methods used for finFETs.
  • No need to change the size or configuration of a device’s footprint.

Samsung initially planned to reach volume production of its MBCFET technology by 2021. This has since been delayed by the ongoing COVID-19 pandemic. The majority of other semiconductor firms are yet to make official announcements regarding GAA technology, however, Intel recently indicated that they expect to produce GAAFETs within the next five years. At the moment, Intel is still using finFETs in their designs by increasing the fin’s height.

GAAFETs and GAA technology are still very much in their infancy, meaning that it’s currently not possible to compare them with finFETs in terms of performance and efficiency improvements. However, Samsung estimates that they could bring as much as 50 percent in power savings, 30 percent in performance improvements, and 45 percent in area reduction. And while these numbers are high, they’re certainly credible given the improvements seen in the jump from planar to finFET.

As always with these technologies, scaling up is the goal and we’ll have to wait and see whether GAAFETs can bring more scalability and higher performance to the table.


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