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Processor chips How to handle the ever-increasing power demands of today’s processor boards

Author / Editor: Nigel Charig / Johanna Erbacher

As processor chips evolve to deliver ever-more computing performance, their power demand has been ramping up accordingly. Delivering these elevated power levels across a computer motherboard without incurring unsustainable losses, or seriously impairing processor performance, has become a major challenge. This article looks at one available solution.

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Lower operating voltages and changing performance requirements place new demands on IBA, which in turn affect system performance.
Lower operating voltages and changing performance requirements place new demands on IBA, which in turn affect system performance.
(Source: gemeinfrei / Unsplash)

To remain competitive, and facilitate emerging processor-hungry applications like artificial intelligence, computer chips are being designed for ever more performance. However, dramatically-increased performance creates a corresponding escalation in demand for power – and this power must be delivered from the power supply to the point of load (PoL), i.e. the chip that needs it.

This delivery path comprises connectors and cables, and then the copper tracks or power plane on the printed circuit board (PCB) containing the processor. And since these elements always have a finite resistance, losses occur as power flows through them. These are known as I2R losses, as their value, in watts, is the product of the square of the load current, I, and the path’s resistance, R.

Over many decades, a large eco-system based on 12V DC-DC converters and regulators had been built up around data centre IT hardware. Therefore, the early response to growing power demand was to use larger connectors, cables and thicker PCB power planes with lower resistance, while maintaining compatibility with 12V levels. This consideration inhibited migration to higher voltage systems, even though a higher voltage would have meant a lower current (Power = V x I) and correspondingly reduced I2R losses. Also, components available until a few years ago became less efficient and more expensive at higher voltage ratings.

Migration from 12V to 48V

However, from around 2015, processor power started rising dramatically, from early levels of typically 5kW to reach 12kW levels. This meant that at 12VDC, 1kA was flowing across the processor PCB power plane. More recently, with the growth in applications like AI, rack power has climbed further, to the 20kW range and beyond, with processors exceeding 1kA steady-state with peak currents approaching 2kA.

At this point, distribution at 12V becomes impractical. Losses would be too high, and processor performance would be severely impacted. Accordingly, the OCP (Open Compute Project) consortium – whose membership includes most cloud, server and CPU companies – is evolving towards racks that accommodate 48V power distribution.

With rising load currents, power systems architecture evolved towards Intermediate Bus Architecture (IBA). With IBA, power travels at 48V across most of the PCB until it reaches a converter which steps it down to 12V. Then, multiple niPOLs (non-isolated point-of-load regulators) buck the 12V further down to specific load voltage requirements.

However, today’s power requirements and lower (< <1V) PoL operating voltages are placing new demands on IBA that now affect system performance. The increase in power and dynamic-load requirements of many of today’s loads (CPUs, GPUs, AI processors) demand that their voltage regulators (VRs) be located as close as possible to the load input power pins. This significantly reduces losses on the PCB. Additionally, many loads require extremely high-current transient response (di/dt), which motherboard impedance can impact.

However, placing high-current voltage regulators close to high-power loads has drawbacks for IBA due to the large number of VRs (niPOLs) required to support the high power. This in turn requires more space, leading to increased distance (impedance) from the load and lower overall efficiencies due to increased losses and subsequent lower dynamic performance. The conversion ratio of 12 to <<1V is also a serious obstacle for the multiphase buck niPOL array due to duty cycle limitations.

Factorized Power Architecture

Vicor provides a solution, known as their Factorized Power Architecture (FPA). While IBA comprises a 48V – 12V conversion stage, followed by regulation and conversion from 12V down to PoL voltage requirements, FPA factorizes these functions into two stages:

  • Voltage regulation (controlling the converter output voltage to a target value even when the input voltage varies)
  • Voltage transformation (converting a voltage from one level to another)

Regulation:A regulator has optimum efficiency when VIN = VOUT and loses efficiency as the regulator's input-to-output ratio increases. With a typical input voltage varying between 36 and 60V, the optimum output bus voltage would be 48V instead of the legacy 12V bus that is typical of IBA. But it is optimal for the power delivery path as well. A 48V output bus requires four times lower current than the 12V bus (P = V x I) and delivery losses are the square of the current (P = I2R); a 16 times reduction.

Transformation: At the load, the 48V voltage has to be transformed down to 1V or less to meet the load requirement. This 48 to 1 voltage conversion ratio is matched by a corresponding transformation of 1A to 48A output current for the load; accordingly, the voltage transformer component could equally be called a current multiplier. In any case, it must be small, so that it can be positioned close to the load and minimise losses as much as possible.

Accordingly, the Vicor Factorized Power Architecture comprises a combination of pre-regulation module (PRMs) and voltage-transformation modules (VTMs, or current multipliers). These two devices work in partnership with one another, each fulfilling its specialized role efficiently to enable the complete DC-DC conversion function.

The PRM supplies a regulated output voltage, or ‘factorized bus’ from an unregulated input source. This bus feeds a VTM which transforms the factorized bus voltage to the level needed by the load.

Unlike IBA, FPA does not step down from an intermediate bus voltage to the PoL through series inductors. Instead of averaging down the intermediate bus voltage, FPA uses high-voltage regulation and “current multiplier” modules (VTM) with a current gain of 1:48 or higher to provide higher efficiency, smaller size, faster response and scalability to 1000A and beyond.

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