BASIC KNOWLEDGE – IGBT IGBT: Meaning, working principles, and more

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IGBT in power electronics is one of the best-selling power transistors that tries to overcome the limitations of power MOSFET and BJT. The article explains the symbol, construction, types, working modes, and operation of the IGBT Transistor. The comprehensive guide also details latch-up, tail current, applications, and advantages of the industry's widely used power transistor.

What is an IGBT?

The basic IGBT mode of operation was proposed in the year 1959 at Mitsubishi Electric, Japan. Y. Akagiri registered a patent for the IGBT mode of operation integrating PNP transistors and MOSFET. Post the invention and commercialization of Power MOSFETs, Dr. B. Jayant Baliga filed a patent at General Electric and successfully fabricated the world's first IGBT- a four-layer semiconductor device that went on to improve power efficiency by 40 %.

What does IGBT stand for?

IGBT in power electronics stands for Insulated Gate Bipolar Transistor. Other names of IGBT include Insulated Gate Transistor (IGT), Metal Oxide Insulated Gate Transistor (MOSIGT), Conductively Modulated Field Effect Transistor (COMFET), and Gain Modulated Field Effect Transistor (GEMFET).

The IGBT symbol explained

The Gate of MOSFET replaces the Base of BJT and acts as the controlling terminal. While Emitter E (or Source) and Collector C (or Drain) are in direct contact with a metal coating, Gate Terminal G is insulated with a Silicon Dioxide layer that generates a potential difference. The space between Gate Terminal G and the other two terminals E and C denotes the insulating layer of Silicon Dioxide.

IGBT Construction

Two terminals of the IGBT: Collector and emitter are directly connected to metal coating but the Gate terminal is not connected to the device. An insulating layer of Silicon Dioxide is embedded between the gate terminal and the metal. The presence of a Silicon Dioxide insulating layer builds a capacitance denoted by C.

A P-Channel IGBT can be made by reversing the doping layers of the device. There are four layers in an IGBT Transistor:

Injecting layer: The layer closest to the collector terminal is called the P⁺ drain or injection layer. We can say that a P⁺ layer is added to a Power MOSFET to design an IGBT Transistor.

Buffer layer: Just above the P⁺ layer, there is an N⁺ buffer layer to increase the voltage rating of the IGBT Transistor. A junction J₁ forms between the P⁺ injection layer and the N⁺ buffer layer for conduction.

Drain drift region: Just above the N⁺ Buffer layer, there is an N^- drift region in the IGBT structure. A junction J₂ forms between the N^- drift region and the P-type body region.

Body region (substrate): On the top of the P⁺ injection layer and N^- drift region, there is a body region comprising of P substrate and N⁺ layers near the emitter terminal of the device. A junction J₃ forms inside the body structure/substrate in the IGBT Transistor.

• The P⁺ injection layer, N^- drift region, and P-type emitter form the PNP transistor.

• The N^- drift region, P-type substrate from the body region, and N⁺ emitter form the NPN transistor.

IGBT working principles

How does an IGBT work?

The structure of an IGBT is similar to a Power MOSFET but its operation resembles a power BJT. It is because a bipolar current flows through electrons and holes. Power MOSFETs only drive unipolar current in the device. But the physical construction of IGBT is similar to an n-channel Power MOSFET with the addition of an injection layer.

The gate terminal of the IGBT is connected to the emitter terminal through a battery. The emitter terminal is connected to the negative of the battery and the gate terminal is connected to the positive. The voltage drop across the emitter and gate terminal is known as _VV_GE. Voltage V_GE is the controlling entity input voltage of the IGBT that controls the output collector current I_C.

The collector terminal of the IGBT is connected to the emitter terminal through another battery. The collector terminal is connected to the positive of the battery and the emitter terminal is connected to the negative. The voltage drop across the emitter and collector terminal is known as V_CE. Voltage V_CE is the output voltage of the IGBT device.

Case 1:V_GE= 0

No current flows through collector to emitter as the J₂ junction is reversed biased. This mode of IGBT operation is known as the cut-off mode.

Case 2:V_GE ≠ 0, 0 < V_GE< V_GET

A very little current (almost negligible) flows from collector to emitter. The small current increases very slowly as the input voltage V_GE reaches near the threshold voltage V_GET.

Case 3:V_GE ≠ 0, V_GE > V_GET, V_CE > 0

The silicon dioxide layer behaves like a dielectric medium to generate a potential difference at V_GE greater than the threshold voltage V_GET. When we connect a voltage between the collector and the emitter V_CE, the junction J₁, and J₃ becomes forward-biased and J₂ reverse-biased.

The capacitance C creates a potential difference across the gate terminal with negative ion accumulation towards the positive gate terminal. The positive ions gather near the semiconductor region. An electric field forms inside the IGBT Transistor from the emitter to the collector. The electric field applies force on the electron upwards. Electrons accumulate under the gate terminal due to the electric field and attractive force of the positive charge. The electrons form an n-channel in the IGBT Transistor like a power MOSFET. The accumulation of electrons near the gate terminal in the body p-region makes the region lose its “P-type character” and become more “N-type”. An n-channel forms from the N⁺ buffer layer covering the N^- drift region and the body region to the emitter.

The channel near the N⁺ emitter region injects electrons into the N^- drift region. The P⁺ injection layer injects high-density minority charge carrier holes into the N^- drift region. Such a high-density concentration of holes inside the N^- drift region attracts some of the electrons to recombine and maintain charge neutrality. The remaining holes are collected at the emitter terminal. The conventional current flows from P to N or collector to emitter. The double conduction property of IGBT makes it a minority carrier device with a drastic reduction in the resistance of the channel.

IGBT operating modes

Conductivity mode

The conductivity mode of operation in IGBT is when the input voltage V_GE is greater than the threshold voltage V_GET and a positive voltage V_CE is applied between the collector and the emitter. Junctions J₁ and J₃ become forward-biased and J₂ reverse-biased. Channel formation takes place and the current flows from the collector to the emitter.

Two BJT of PNP and NPN configuration combine to form four alternating layers of P-N-P-N arrangement inside the internal structure of IGBT. These layers form junctions inside IGBT to modulate the conductivity through input voltage and capacitance. The two transistors form an inverted Darlington pair (Sziklai pair) inside the IGBT structure.

Holes are injected from the P⁺ injection layer to N^- drift region and electrons travel from N⁺ emitter to the N^- drift region through the conducting channel. The excess concentration of holes and electrons results in high conductivity of the N^- drift region. Thus by controlling the gate voltage, the conductivity of the N^- drift region of IGBT can be modulated. The thickness of the N^- drift region is responsible for the voltage-blocking capacity of the device. The process that enhances the conductivity of the N^- drift region is called conductivity modulation. The conductivity modulation increases the current density of IGBT and reduces the resistance of the N^- drift region and forward voltage drop. The injection of minority charge carriers into the internal regions of IGBT reduces ON state resistance. Low ON-state resistance for turning ON the device implies that the Power loss P=I²R is very low.

Forward blocking mode

The forward blocking mode of operation in IGBT is when the gate is shorted to the emitter terminal and a positive voltage V_CE is applied between the collector and the emitter.

Junctions J₁ and J₃ become forward-biased and J₂ reverse-biased. The depletion layer of junction J₂ extends into N^- drift region and P-region. The forward-biased junctions enable a small leakage current to flow through the IGBT.

Reverse blocking mode

The reverse blocking mode of operation in IGBT is when the gate is shorted to the emitter terminal and a negative voltage V_CE is applied between the collector and the emitter.

Junctions J₁ and J₃ become reverse-biased and J₂ forward-biased. The depletion layer of junction J₁ extends into N^- drift region and P-region. An extremely small leakage current flows due to forward biased junction in the IGBT.

Equivalent circuit structure

The four-layer three-terminal semiconductor device is physically similar to a Power MOSFET. The P⁺ injection at the bottom acts as the drain and the N⁺ layer at the top acts as the source. The injection function of the P⁺ injection layer makes the operation of an IGBT similar to a power BJT.

An equivalent circuit model of IGBT connects a MOSFET and a Sziklai pair. This forms four layers of P-N-P-N inside the IGBT.

• The collector terminal of PNP is connected to the base terminal of NPN.

• The collector terminal of NPN is connected to the base terminal of PNP.

Looking at the figure of basic structure, we can say that

• P substrate serves as a base for NPN and a collector for PNP transistors.

• N^- Drift Region serves as a base for PNP and a collector for NPN transistors.

Circuit diagram of IGBT

The voltage across the gate controls the current flowing through the circuit. The main feature of IGBT is the injection of minority charge carriers from the collector to the emitter, enabling conductivity modulation. The gate is connected to the emitter wrt to the positive terminal of the battery V_G. Similarly, the collector is connected to the emitter wrt to the positive terminal of the battery V_CC.

V_GE = Gate-to-emitter voltage
V_CE = Collector-to-emitter voltage
I_C = Collector current
I_G = Gate current
R_G = Resistance across gate
R_C = Resistance across collector

Characteristics of IGBT

Transfer characteristics

Transfer characteristics of an IGBT is a graph of the output current I_C on the Y-axis against input voltage V_GE on the X-axis.

When the gate-to-emitter voltage V_GE (input voltage) is greater than the gate-emitter threshold voltage V_GET (Condition: V_GE > V_GET), the output current I_C increases for IGBT operation.

Gain

The formula of gain is conventionally the ratio of the output current to the input current. It is not considered in the case of an isolated gate terminal with a Silicon Dioxide Insulation Layer. Since IGBT is a voltage-control device, we can take input voltage into account for calculating values like gain, transconductance, etc.

The gain of IGBT can be calculated by a change in output current wrt to the change in input voltage, represented by "β" (Beta; see Equation 1).

This concludes that IGBT is a voltage-control four-layer three-terminal transconductance device with low state ON power loss.

Output characteristics

The output characteristics of IGBT are a graphical relationship between the output voltage V_CE on the X-axis and the output current I_C on the Y-axis.

Case 1: 0 < V_GE < V_GET

I_C is minimum (almost negligible) because of some minor charge carriers present in the device. IGBT does not conduct and is fully off. This state of IGBT when the input voltage is zero is known as a cut-off or fully-off state.

Case 2:V_GE > V_GET

When input voltage V_GE increases beyond the threshold level, output collector current I_C initially increases with increasing output voltage V_CE. This is the region where the device is fully-ON. In the active region, the collector current I_C increases up to a certain level and becomes constant with increasing V_CE. Since junctions J₁ and J₂ cannot become forward-biased at the same time, the IGBT does not operate in the saturation region.

IGBT types explained

Punch through IGBTs

The above-described construction for IGBT is referred to as punch-through IGBT. A punch layer is an N⁺ buffer layer added between P⁺ the Injection layer and N^- drift region. An N⁺ buffer layer is “punched” between P⁺ the injection layer and N^- drift region to limit the number of hole injections. The depletion layer extends into the N^- drift region and N⁺ buffer layer. PT-IGBTs are manufactured using a thin-wafer punch-through technology.

The number of minority carriers in N^- drift region is larger than the number of minority carriers in the body region. It enables the placement of the N⁺ buffer layer close to the N^- drift region than the body region. The drawback of PT-IGBT is that the P⁺ injection layer is heavily doped for the effective transfer of minority charge carriers from the collector to reduce the on-state voltage. Compared to NPT-IGBT, the tail current flow decreases the thermal stability of the device and increases the switching loss.

To reduce the effective switching loss, crystal defects are induced in N^- drift region. The process of introduction of such crystal defects is known as lifetime control.

Non-punch-through IGBTs

An IGBT without a buffer layer/punch layer is a Non-Punch-Through IGBT (NPT-IGBT). The manufacturing process of NPT-IGBT involves a technology using a less expensive diffusion process. The P⁺ injection layer is lightly doped in NPT-IGBT.

The depletion layer remains within the N^- drift region. The absence of the buffer layer is one of the drawbacks of the NPT-IGBT. It is because the device is unable to restrict the expansion of the depletion layer into the collector. Other drawbacks include low on-state voltage and slower turn-off time. However, NPT-IGBT has lower switching losses and higher thermal stability compared to PT-IGBT.

IGBT Switching

An IGBT testing circuit with either an inductive or resistive load and switching waveforms specify the rise and fall times of the power transistor. This section provides general IGBT switching waveforms to provide a comprehensive understanding of turn-on and turn-off times.

An IGBT driver circuit enhances the switching functions of the IGBT transistor. Earlier resistors were used instead of the gate drive circuit for IGBT to control the input capacitance and gate voltage. The gate circuit takes input from the microcontroller and produces the output current to drive the power switch. The IGBT driver charges and discharges the input capacitance to turn on and off the IGBT switch. The use of the correct gate drive circuit for IGBT improves switching speed and ensures its operating in the reverse safe operating area (RSOA).

The internal MOS structure and the input capacitance are among the crucial parameters that decide IGBT switching time. When a positive gate voltage V_GE is applied, the gate current starts to charge the input capacitance. The collector current I_C starts flowing when V_GE increases beyond the threshold voltage V_GET.

At time t1, the IGBT switch turns on. The collector-to-emitter voltage V_CE starts to reduce due to the discharging of gate-to-drain capacitance C of the internal MOSFET. The IGBT switching device maintains the on state up to time t10.

The IGBT testing waveforms clearly state that the turn-off is a slow process even when V_GE becomes negative and V_CE starts increasing. The minority charge carriers in the N^- drift region make up the tail current that supports the ON state of the device. A negative V_GE is applied to attain a low switching loss and to avoid IGBT accidental turn-on due to noise. The gate-to-drain capacitance C starts to charge and V_CE starts to increase. The internal MOSFET moves from the saturation region to the linear region for the switch to turn on.

• Turn ON time: The time taken by the collector current I_C to reach 90 % of the maximum value when the collector-to-emitter voltage V_CE is at 10 % is termed turn-on time.

• Rise time: The time taken by the collector current I_C at a minimum of 10 % to reach 90 % of the maximum value is called rise time. Referring to the above characteristic diagram, the rise time is from t1 to t2.

• Turn-OFF time: The time taken by V_CE to rise to 90 % of the maximum value during the turning-off process is called turn-off delay time.

• Fall time: Fall time is the time taken by the collector current I_C at a maximum level of around 90 % to fall to a minimum of 10 %. Referring to the above characteristic diagram, the fall time is from toff to t9.

IGBT Applications

IGBT power mode: The IGBT module consists of a group of IGBTs (called dies) soldered on a power semiconductor substrate. Just like any other module, the IGBT power module provides electric insulation, and thermal and electric connection wherever needed. The IGBT module performs switching functions and contains thermistors, ceramic capacitors, and other components to provide reliability.

IGBT as a switch: IGBTs are used extensively as power switches in inverters to convert DC power to AC power. Multiple IGBT power modules make up an IGBT inverter to ensure high voltage. A few examples of an IGBT Inverter include refrigerators, AC, motors, automotive, etc.

Some other applications of an Insulated gate bipolar transistor include:

• Switching power supply

• Variable Frequency Drivers (VFDs)

• Variable-speed home appliances like refrigerators and air conditioners.

• Industrial motors

• Electric cars

IGBT advantages

Insulated gate bipolar transistor has its switching frequency and voltage and current ratings between BJT and MOSFET. IGBTs combine the features of BJT and MOSFET to offer an improved power device with high ratings and low losses. Some of the IGBT features are:

• High voltage rating

• High current rating

• Bipolar current flow

• Minority carrier device

• Low driving power

• No complex IGBT gate driver circuitry

• Low ON state power loss

• Wide safe operating area

• High input impedance

• Low output impedance

• Medium switching speed

• Fully controllable

• Higher switching frequency than BJT

• Low switching loss

IGBT disadvantages

Altough there are many advantages, there are also some limitations of IGBT, such as:

• Excessive power dissipation

• Slow turn-off time

• Parasitic turn-on

• Tail current

• Lower switching frequency

• Latch-up

Tail current

During IGBT turn-off, the current flow is restricted by the reduction in V_GE below the threshold level. Still, some negligible current flows through the device as holes are present in the N^- drift and body region. These holes take time T to recombine for charge neutralization. The time T until recombination starts is termed as the minority carrier lifetime. Until the recombination, the existing current is known as the tail current.

IGBT latch-up: Parasitic thyristor

The IGBT transistor is a functional integration of power MOSFET and BJT. The device has a controlling terminal gate, emitter, and collector terminals. The internal PNP transistor Q1 turns on the MOSFET for current to flow in an IGBT device.

The lower transistor Q2 must be turned off because it adds a voltage drop in the IGBT. These connections form a negative regeneration feedback loop between the collector and the emitter terminal representing an undesirable parasitic thyristor. Turning on transistor Q2 turns on the undesirable parasitic transistor. The electrons in the channel attract holes and generate the hole current in the P-type body region. The current takes an auxiliary horizontal path in the body region to cause a voltage drop across the resistance of the P-type layer.

The voltage drop forward biases the base-emitter J₃ of the NPN Q2 transistor and turns on the internal parasitic SCR Thyristor. The process where internal parasitic SCR turns on is termed IGBT latch-up.

Since SCR turn-off is a challenging process, IGBT loses its voltage control capability and becomes a semi-controlled device. Moreover, latching up of the IGBT Transistor produces large losses.

Measures to avoid latch-up:

• The current flowing through the IGBT Transistor must be below the manufacturer-defined maximum value.

• Connect resistance R to shorten the base-emitter of the NPN transistor.

• Deep diffusion of P⁺ layer.

• Reduce gain of the internal NPN transistor.

• Using a buffer layer.

IGBT vs. MOSFET - What's the difference?

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