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INFRASTRUCTURE TIME MACHINE 'Infrastructure time machine' reduces semiconductor production time and increases net profit

From Business Wire (press release)

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The Bizen Infrastructure Time Machine (ITM) enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times. It could help solve the semiconductor shortage crisis and end the monopoly of Taiwanese and Korean chipmakers.

Current state-of-the-art 3nm fabs will be able to deliver incredible sub-nm, Angstrom-level capabilities.
Current state-of-the-art 3nm fabs will be able to deliver incredible sub-nm, Angstrom-level capabilities.
(Source: knssr -

A new semiconductor technology could be applied at older-generation Fabs, which would enable them to produce top performing chips for 5G and AI computing applications – and make these otherwise moribund facilities competitive with the Taiwanese and Korean giants, TSMC and Samsung. It would also ensure IP security in Western countries, and address the chip shortage crisis, since much more capacity would become available, and because the chip making process is speeded up hugely. Finally, it would enable government-funded programs such as the Chip Act to maximize their ROI, since chip-making will become much cheaper and require less capital expenditure.

Search for the Next (SFN), developers of the compound combination of the Bizen wafer process, Zpolar transistor and Zpolar Tunnel Logic (ZTL), now has available a family of four ITMs (Infrastructure Time Machine) – which can be considered process nodes – that enable chip designers to produce ICs in older 180nm and even one micron geometry fabs with the equivalent performance of CMOS devices made in current state-of-the-art plants. For example, a fab equipped with 180nm photolithographic steppers – such as Newport Wafer Fab, the UK’s largest semiconductor production plant which is at the centre of a political and trade war over its proposed sale to foreign owners – could now produce ZTL devices with the performance (size, speed and performance) of 35nm CMOS by implementing ITM35...and at a hugely reduced cost.

Explains David Summerland, CEO of SFN: “Until Bizen, the Zpolar transistor and ZTL logic, high performance chips for applications such as 5G and RISC-V could only be produced at facilities such as the Taiwanese giant, TSMC, which controls most of the world’s high-performance semiconductor production. Now, UK and other Western fabs can be competitive again, and even overtake the Taiwanese and Korean giants, while also securing best national interests and IP.”

SFN is releasing four ITMs: ITM180 which can deliver ZTL chips with the performance of 180nm CMOS using one micron equipment; ITM35 which enables 35nm CMOS-equivalent ICs to be made in 180nm process node fabs; ITM5 which enables 5nm CMOS performance from 28nm steppers, and ITMSubnm which means that current state-of-the-art 3nm fabs will be able to deliver incredible sub-nm, Angstrom-level capabilities. VHDL is taken into the chosen ITM, which delivers both the POR (Process Of Reference) and the GDSii for the resultant IC to the fabs. The Infographic shows this process.


The Bizen Infrastructure Time Machine (ITM)

(Bildquelle: Business Wire)

On the left axis we see CMOS fabrication nodes stretching back in time from today’s 3nm state-of-the-art. Each row represents approximately one decade. The right axis shows the CMOS node that would be required to achieve the performance that the compound combination of the Bizen wafer process Zpolar transistor and Zpolar Tunnel Logic (ZTL) can offer. The increasing number of cones shows how markets have widened each decade from just the computers applications of 60 years ago, to today, where the micro chip is ubiquitous and used in everything from the IoT, EVs, communications and consumer goods through to defence and other nationally-strategic and sensitive installations. Foundries can use the ITM process nodes to employ an older CMOS-equivalent processing node to produce ZTL-based chips which offer orders-of-magnitude performance increases over their now-obsolete CMOS equivalents. VHDL is taken into the selected ITM (dependant on performance requirements) from chip designers. The ITM, which contains the fully-characterized device libraries (LIB) and Process Development Kit (PDK), supplies both the Process of Reference (POR) and GDSii information to the foundries to make the ZTL chip.

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