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 Christian Schwabe

Christian Schwabe

Scientific staff , TU Chemnitz

PCIM EUROPE 2021 - 1. WINNER OF YOUNG ENGINEER AWARD Power cycling lifetime investigation under low temperature swings and 50 Hz load

Author / Editor: Christian Schwabe / Nicole Kareta

How to evaluate the possible liefetime in application? The answer to this question is power cycling tests. Research has already produced numerous findings in this area, but a temperature swing below 30 K has not yet been taken into consideration. However, this range is very interesting for application use.

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Experimental test results have been performed between 55 K and 25 K.
Experimental test results have been performed between 55 K and 25 K.
(Source: ©pickup - stock.adobe.com)

Power cycling tests are fundamental to evaluate the possible lifetime in application. In lab tests internal conduction losses cause high thermo-electrical stress inside the power electronic system. A cycling load will lead to low cycle fatigue which addresses standard weak points like the solder layer and the bond wire interconnection. This knowledge is well-known and several research papers have already dealt with this topic. Nevertheless, there are still existing white spots in reliability testing due to complex difficulties in experimental testing. Durand1) et al. reviewed a total of 70 publications in recent years and none of these publications have dealt with a temperature swing below 30 K. Therefore, this area is highly interesting for application use.

Power cycling with switching losses

To address the area a new test bench concept was introduced. A schematic circuit is displayed in Figure 1. In each phase three devices under test (DUT) can be stressed, while DUT 1 and 2 perform inductive switching and DUT 3 is a reference device. All devices are controlled by a gate drive unit (GDU) and the switched devices have an additional boosted clamping circuit (BAC) to limit the clamping voltage. The main advantage is that switched devices can be heated by an adjustable portion of switching losses, controlled by the switching frequency.

Figure 1: Schematic circuit of power cycling with switching losses in a symmetric three-phase tester with detailed phase 1.
Figure 1: Schematic circuit of power cycling with switching losses in a symmetric three-phase tester with detailed phase 1.
(Source: Christian Schwabe)

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  • why testing in the high cycle fatigue area is very complex,
  • what you should keep in mind when transferring power cycling results to application close conditions,
  • how to use 3D-simualtion to enhance physical understanding of failure mechanisms,
  • and what are still limitations for reliability testing in the high cycle fatigue zone.
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    Experimental results

    For millions of expected cycles in the high cycle fatigue area, the on-time is reduced in the millisecond range. Power cycling with switching losses allows to stay below the nominal current of the devices while still reaching decent temperature swings for accelerated testing.
    Several experimental results were gained with this test concept. Figure 2 shows a comparison for an Econo pack 3 device with a nominal current of 150 A. For standard power cycling (dark blue) the bond interconnection is overstressed with 276 A, which reduces the lifetime compared to power cycling with switching losses (black). Experimental test results have been performed between 55 K and 25 K, which can be found in the full paper. A shift in the failure mechanism from bond wire lift off towards solder fatigue was inspected and discussed as well.

    Figure 2 Experimental results for test 1 and 3 with CIPS reference expectation in black and modified CIPS in red for ton = 20 ms and Tvj,max = 150°C.
    Figure 2 Experimental results for test 1 and 3 with CIPS reference expectation in black and modified CIPS in red for ton = 20 ms and Tvj,max = 150°C.
    (Source: Christian Schwabe)

    Simulation results

    Additional simulations of a digital twin should answer the question on how the experimental measurement error for the maximum junction temperature influences the results for the small temperature swings. A second point is a better understanding of the physical background for the wear out failures. Hence, thermal and thermal-mechanical simulations were performed, with strong focus on the temperature distribution and stress concentration at the main weak points.

    An example result of four load cycles with 10 ms on-time and 20 ms off-time is presented in Figure 3. The resulting temperature swing is approx. 50 K for the virtual junction temperature. A more detailed analysis and mechanical simulation results, especially for the chip solder as main failure location, can be found in the full paper.

    Summary and outlook

    Power cycling with switching losses allows testing in the high cycle fatigue zone, while first results were gained. A thorough 3D simulation could enhance experimental data and verify main weak points. The data can be used for better classification of harmful temperature swings in a rain flow analysis. Still under investigation is the behavior for the reduced maximum junction temperature and a variation of the power loss density. Additionally, the extrapolation of the lifetime to even smaller temperature swings which are not suitable for any kind of testing is focus of further research.

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    1)Durand, C., Klingler, M., Daniel, C., & Naceuer, H. (2016). Power Cycling Reliability of Power Module: a Survey. IEEE Transactions on Device and Materials Reliability, (S. 1-6). doi: 10.1109/TDMR.2016.2516044.

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    About the author

     Christian Schwabe

    Christian Schwabe

    Scientific staff , TU Chemnitz